Monday, September 28, 2009

IBM Introduces New PowerPC CPU Core

At last week's Linley Tech Processor Conference, IBM announced the successor to its PowerPC 440/464 CPUs, the PowerPC 476FP. Able to issue up to five instructions at a time and process instructions out of order, the 476FP will likely achieve industry-leading single-thread throughput for a CPU core. Having a nine-stage pipeline and implemented as a hard core, the 476FP is conservatively rated at 1.6GHz in IBM's 45nm SOI process. In this configuration, the core measures 3.6mm2 and consumes 1.6W. Customers can begin designing ASICs using the CPU in October. IBM expects the first 476FP-based products to qualify for production in 2010. A synthesizable version will also be available.

The most similar CPUs to the 476FP are the e500mc from Freescale and the CPU used in RMI's XLP832. To conserve power, Freescale limits the speed of the e500 to 1.5GHz in 45nm, and it can issue only two instructions per cycle. Interestingly, both the 476FP and the e500mc incorporate floating-point units. The XLP's CPU is billed as running at up to 2GHz. It's a four-issue machine and thus likely to deliver similar single-thread performance as the 476FP. Being multithreaded, it has the potential for greater throughput than the 476FP, however.

Among licensable CPU cores, the 476FP is most similar to ARM's Cortex-A9. Both IBM and ARM claim their processors achieve the same performance per MHz on small benchmarks. The processors have a similar number of pipeline stages, can issue a similar number of maximum instructions per cycle, and have similar branch prediction. The 476FP is likely to perform better on most real-world code. The A9 cannot sustain its peak issue rate because it can only decode two instructions per cycle, and the 476FP can issue more integer instructions per cycle. The A9, however, supports ARM's Neon instructions, which give it an edge for multimedia applications.

Chip designers seeking a fast CPU for integration in their ASICs and ASSPs will find the 476FP the top choice. Its PowerPC compatibility makes it particularly well suited to communications and enterprise applications where the architecture has a strong presence. A key ingredient in LSI's multicore architecture, the 476FP will distinguish LSI from its competitors. --Joe

Joseph Byrne, senior analyst

Get the complete details on the new LSI platform (two separate slide presentations) in the Linley Tech Processor Conference proceedings (free download)

Monday, September 21, 2009

ST-Ericsson Revamps Connectivity Portfolio

Pulling together the best technologies from merger partners ST and NXP, ST-Ericsson has announced two new mobile connectivity chips that together deliver a complete solution for handsets and smartphones. The CG2900 is a combo chip that includes Bluetooth 3.0, FM receive/transmit, and GPS, the three most popular technologies for feature phones. For smartphones and other devices that require Wi-Fi, the new CW1100 offers a single-chip 802.11b/g/n device that is designed to cooperate with the CG2900. Both products use leading-edge 45nm technology and are scheduled to sample in 4Q09.

The CG2900 combines proven FM and GPS technology from NXP with ST's Bluetooth core. The Bluetooth stack is upgraded to support Bluetooth 3.0 high-speed mode, which routes Bluetooth requests through the external Wi-Fi chip, if available, and Bluetooth Low Energy (LE) mode. The GPS core has been improved from the earlier GNS7560 (GloNav) device to deliver –165dBm tracking sensitivity, a figure matched only by Infineon's standalone Xposys chip.

The CW1100 is one of the few mobile Wi-Fi chips that supports 802.11n, although it operates at 2.4GHz only and not in the less crowded 5GHz band. It is the only standalone 802.11n chip that integrates a CMOS amplifier powerful enough to eliminate the need for an external PA; the CW1100 is rated at +21dBm of output power. (Broadcom integrates a similar PA in its BCM4329 Wi-Fi combo chip.) This integration keeps the total solution size to 45mm2, the smallest Wi-Fi design yet reported.

Although ST-Ericsson is the fourth vendor with a GPS combo chip, it is the first to announce a 45nm device. The CG2900 matches the feature set of existing devices while supporting the latest Bluetooth standards and offering better GPS performance, particularly when compared against CSR's BlueCore7. The CW1100 offers 802.11n support and requires little board area. If ST-Ericsson delivers these products as planned, they will set a new technology standard in mobile connectivity. --Linley

Linley Gwennap, president and principal analyst

Complete coverage of competing products appears in our report "A Guide to Mobile Connectivity Chips."

Friday, September 4, 2009

Multicore Mania Coming Soon

The consensus for the past few years has been that multicore microprocessors provide the path to higher performance. Still, it came as a surprise to me when putting together the program for the Linley Tech Processor Conference how many talks discuss multicore processing—about two-thirds of the 20+ presentations.

If multicore is truly de rigueur, this in and of itself isn’t news. But there are plenty of new developments going on. The action at the high end is to be expected. Freescale, which qualified its first major dual-core processor (the MPC8572) for production last year and only recently began sampling its eight-core device, is announcing a new multicore processor. LSI is entering the ring with a multicore architecture of its own.

There’s action further down the performance spectrum, too. TranSwitch’s broadband-gateway processor is a multicore implementation. Cavium and Marvell are discussing low-power multicore processors that operate below 5W. IP suppliers are involved as well. IBM has a new CPU core for SMP applications, and MIPS Technologies is presenting a solution to analyzing race conditions in parallel programs.

By looking at parallel programming, MIPS is demonstrating that the people who understand multicore best are software programmers. Continuous Computing and Enea are presenting their software solutions to systems designers seeking to harness multicore processors.

In summary, the multicore approach is not just for high-end implementations; it is for a wide spectrum of designs. The challenge of using multicore processors remains, but software suppliers are easing the transition from the single-core to the multicore era. --Joe

Joseph Byrne, senior analyst